1. Field of the Invention
This invention relates to integrated circuits and methods for their fabrication. In particular, this invention relates to a method for forming an effective plasma barrier for patterning a protective insulating layer over a semiconductor structure.
2. Description of the Prior Art
In the fabrication of integrated circuits, P and N conductivity type dopants are sequentially introduced into regions of semiconductor material to form active and passive electronic components. This is generally achieved by forming one or more layers of desired material over the semiconductor, and patterning each layer by etching through a mask to expose portions of the underlying layer. The appropriate dopant is then introduced by diffusion or ion implantation after each etching step.
Present techniques for forming the mask generally involve depositing a masking material, usually silicon dioxide, over the insulating layer by chemical vapor deposition or vacuum methods. Photolithographic exposure and etching must then by done to pattern the mask. These techniques are cumbersome and expensive.